MIPS instruction set and brief analysis R format instruction I format instruction J format instruction instruction analysis

MIPS instruction set and brief analysis R format instruction I format instruction J format instruction instruction analysis

R format instructions

Basic format

mark

op

rs

rt

rd

shamt

funct

Number of digits

31-26

25-21

20-16

15-11

10-6

5-0

Features

Operator

Source operand register 1

Source operand register 2

Destination operand register

Displacement

Operator additional section

instruction

Arithmetic instructions

instruction

op

rs

rt

rd

shamt

funct

Features

add

000000

rs

rt

rd

00000

100000

rd=rs+rt

addu

000000

rs

rt

rd

00000

100001

rd=rs+rt (unsigned number)

sub

000000

rs

rt

rd

00000

100010

rd=rs-rt

subu

000000

rs

rt

rd

00000

100011

rd=rs+rt (unsigned number)

slt

000000

rs

rt

rd

00000

101010

rd=(rs<rt)?1:0

sltu

000000

rs

rt

rd

00000

101011

rd=(rs<rt)?1:0 (unsigned number)

Logical instructions

instruction

op

rs

rt

rd

shamt

funct

Features

and

000000

rs

rt

rd

00000

100101

rd=rs&rt

or

000000

rs

rt

rd

00000

100101

rd=rs|rt

xor

000000

rs

rt

rd

00000

100110

rd=rs xor rd

nor

000000

rs

rt

rd

00000

100111

rd=!(rs|rt)

Displacement instructions

instruction

op

rs

rt

rd

shamt

funct

Features

sll

000000

00000

rt

rd

shamt

000000

rd=rt<<shamt

srl

000000

00000

rt

rd

shamt

000010

rd=rt>>shamt

sra

000000

00000

rt

rd

shamt

000011

rd=rt>>shamt (sign bit reserved)

sllv

000000

rs

rt

rd

00000

000100

rd=rt<<rs

srlv

000000

rs

rt

rd

00000

000110

rd=rt>>rs

srav

000000

rs

rt

rd

00000

000111

rd=rt>>rs (sign bit reserved)

Jump instruction

instruction

op

rs

rt

rd

shamt

funct

Features

jr

000000

rs

00000

00000

00000

001000

PC=rs

I format command

Basic format

mark

op

rs

rd

im

Number of digits

31-26

25-21

20-16

15-0

Features

Operator

Source operand register

Destination operand register

Immediate

instruction

Arithmetic instructions

instruction

op

rs

rd

im

Features

addi

001000

rs

rd

im

rd=rs+im

addiu

001001

rs

rd

im

rd=rs+im (unsigned number)

slti

001010

rs

rd

im

rd=(rs<im)?1:0

sltiu

001011

rs

rd

im

rd=(rs<im)?1:0 (unsigned number)

Logical instructions

instruction

op

rs

rd

im

Features

andi

001100

rs

rd

im

rd=rs&im

ori

001101

rs

rd

im

rd=rs|im

xori

001110

rs

rd

im

rd=rs xor im

Load class instruction

instruction

op

rs

rd

im

Features

lui

001111

00000

rd

im

rt=im*65536

lw

100011

rs

rd

im

rt=memory[rs+im]

sw

101011

rs

rd

im

memory[rs+im]=rt

Jump instructions

instruction

op

rs

rd

im

Features

beq

000100

rs

rd

im

PC=(rs==rt)?PC+4+im<<2:PC

bne

000101

rs

rd

im

PC=(rs!=rt)?PC+4+im<<2:PC

J format instruction

Basic format

mark

op

address

Number of digits

31-26

25-0

Features

Operator

address

instruction

instruction

op

address

Features

j

000010

addr

PC={(PC+4)[31,28],addr,00}

jal

000011

addr

$31=PC;PC={(PC+4)[31,28],addr,00}

Command analysis

Instruction format

MIPS_order.png

Instructions of different formats have different functions, among which:

  • R format instructions are pure register instructions, and all operands (except shift) are stored in registers. Op fields are all 0, use funct field to distinguish commands
  • The I format instruction is an instruction with immediate data, which uses two registers at most, and includes load/store instructions at the same time. Use Op field to distinguish instructions
  • The J format instruction is a long jump instruction with only one immediate operand. Use Op field to distinguish instructions

Data path

The above instructions include the following data paths related to instructions:

  • Instructions-register group: R format instructions are all register instructions, and the instructions need to provide the register address
  • Instruction-arithmetic unit (ALU): the arithmetic instruction provides the type of operation by the instruction, and at the same time provides the immediate value and displacement involved in the operation
  • Instruction-memory: The addressing mode of load/store instruction is only register offset addressing, and the instruction needs to provide immediate offset
  • Instruction-PC: The J format instruction needs to load the immediate data in the instruction into the PC

There are also several necessary data paths that are not related to instructions:

  • Register group-arithmetic unit (ALU): The register group provides operands for the arithmetic unit, and the operation result is stored in the register group
  • Register group-memory: both ends of load/store instructions
  • Register group-PC: Jump instructions are related to the register group

When using the Haval structure, the data path block diagram is as follows:

MIPS_dataflow.png

Pipeline division

If it is implemented using a pipeline, the pipeline can be divided into four stages: fetching -> decoding -> preparing operands -> executing -> writing back:

  • Instruction fetch stage: Press the PC to fetch the complete 32-bit instruction from the instruction register, and then the PC is incremented
  • Decoding stage: interpret the instruction into the corresponding format according to the high 6 bits of the instruction (Op field)
  • Operand preparation stage: Prepare operands according to the corresponding fields in the instruction, including: calculating the address (load/store instruction), fetching the operand from the register and placing it on the data bus (register instruction), calculating the PC value (jump instruction), etc.
  • Execution stage: execute instructions, including: access to memory (load/store instructions), ALU operations (calculation instructions), refresh PC values ​​(jump instructions), etc.
  • Write-back stage: Store the result in the register, including: ALU operation result (calculation instruction), memory access result (load instruction), original PC value (with return jump instruction), etc.
Reference: https://cloud.tencent.com/developer/article/1110948 MIPS instruction set and brief analysis R format instruction I format instruction J format instruction instruction analysis-Cloud + Community-Tencent Cloud